Suppliers of digital communication circuits, such as those for transmitting digital data, including, but not limited to an RS-232 formatted digital data stream, must conform with user specifications that define maximum and minimum limits on slew rate, as well a rise and fall time boundaries of respective signal transitions in the transmitted data. Unfortunately, the characteristics (especially capacitance) of the loads (lines) to which such digital data transmission equipment may be connected can be expected to vary from line to line, so that the performance of the equipment is potentially susceptible to the unknown variations in the properties of the line.
The conventional practice to handle these variations has been to drive the line hard by means of a high gain amplifier, such as the high gain operational amplifier schematically illustrated at 100 in FIG. 1, and hope that the capacitance of the line (which typically may fall anywhere between 50 and 2500 picofarads) will not significantly distort the output signal (take the circuit's performance outside of spec.). The fundamental problem with this approach is the fact that the load, illustrated as a parallel RC circuit 110 coupled between the amplifier output node 120 and ground, effectively becomes part of the circuit and thereby affects the time constant properties (slew rate and rise/fall times) of the amplified driving signal. In order to ensure that ample current gain is provided to the driven signal, a substantial bias current is continuously applied to the amplifier, resulting in unwanted power dissipation in the circuit at (steady state) times other than during signal transient conditions.